IntelliC Human- and LLM-friendly intelligent compiler infrastructure with inspectable representations ISAMORE Finding reusable instructions via e-graph anti-unification APS/Aquas Holistic MLIR-based ASIP hardware-software co-design framework EggMind LLM-guided EqSat strategy synthesis with explicit strategy artifacts Hive Multi-agent inference infrastructure for algorithm- and task-level scaling PTO Runtime Ascend task-graph runtime coordinating host, AICPU, and AICore execution SkyEgg Joint implementation selection and scheduling using e-graphs Cement Cycle-deterministic embedded HDL in Rust with event-based control synthesis Hector Multi-level IR for hardware synthesis built on MLIR Cayman Automatic accelerator generation with control flow and data access optimization