Youwei Xiao
Youwei Xiao 肖有为
School of Integrated Circuits
Peking University
Beijing, China
I am a Ph.D. candidate at the School of Integrated Circuits, Peking University, advised by Prof. Yun Liang, and a Large Language Model Algorithm Intern at ByteDance Seed. My current research centers on agents for LLM infrastructure on emerging AI chips. I contribute to native multi-agent coding systems, focusing on multi-agent orchestration strategies and workflow customization through programmable concurrency and human-in-the-loop workflows for long-horizon systems development.
I apply these approaches to LLM infrastructure on emerging AI chips. I evolve an abstraction-layered operator-optimization skill system and an agent-native compiler stack for operator implementation, chip-architecture-aware performance optimization, and automated toolchain development. This work improves model-serving efficiency on new chips, while real development data and trajectories become training signals for model-capability improvement.
My earlier research follows a compiler-driven approach to agile chip design: use DSLs and multi-level IRs to expose architecture choices, then build compilation and synthesis stacks that optimize software and hardware together. Hector provides multi-level IRs for hardware synthesis. Cement couples the cycle-deterministic CmtHDL DSL with the CmtC compiler for timing analysis and control synthesis. APS/Aquas builds an MLIR-based stack from architecture DSLs to hardware synthesis and software compilation, then extends it with domain-specific memory/synthesis directives and an e-graph retargetable compiler.
Across this compiler-driven stack, ISAMORE (ASPLOS 2026 Best Paper) and EggMind structure optimization search with formal and LLM-guided methods; Clay, Cayman, and SkyEgg automate microarchitecture and accelerator optimization; and IntelliC makes compiler artifacts inspectable for human-agent collaboration. PTO Runtime carries compiled task graphs onto Ascend chips and LingQu SuperPods, while Hive and Spine extend the story toward multi-agent LLM infrastructure and cross-layer agentic co-design. These systems are now the technical substrate on which my native multi-agent work operates.
news
| May 28, 2026 | Awarded 博士研究生校长奖学金 for the 2026-2027 academic year, with 10 recipients selected from the School of Integrated Circuits. |
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| May 09, 2026 | Awarded 学术之芯, a 2026 academic honor from Peking University’s School of Integrated Circuits granted to 8 recipients. |
| Mar 31, 2026 | ISAMORE wins the ASPLOS 2026 Best Paper Award (5/1048)! |
selected publications
- Arch 2.0EggMind: LLM-Driven Two-Dimensional Intelligence for Scalable Equality SaturationIn Architecture 2.0: Workshop on AI for Computing Systems Design, 2026